As a DFT Engineer you will

• Develop and implement DfT architecture
• Work with the validation team to verify DfT implementations and implement design changes
• Generate structural test vectors, analyze and improve coverage
• Work with designers on STA, physical, power and logical issues
• Work with Test Engineers to bring up test vectors on silicon

Minimum Qualifications

Master Degree in Electrical / Computer Engineering or equivalent;
We are counting on your expertise and knowledge about industrial standards and practices in DfT, including ATPG, JTAG, MBIST and trade-offs between test quality and test time;
You are confident with Verilog and / or VHDL, and have experience with simulators and waveform debugging tools;
English language fluency is required (written and verbal)

Preferred Qualifications

By now you are demonstrating confirmed understanding of design verification (DV) methodologies for validating DfT implementation in simulation pre-silicon;
You have knowledge on how to debug ATPG patterns, compressed ATPG patterns, MBIST, and JTAG/1500 related issues;
You have experienced with STA constraints development and analysis for DfT modes and SDF simulations;
You love conducting experiments during silicon debug, capturing and analyzing data; and use scripting to support efficient handling of ATE data;